| Categories | USRP SDR |
|---|---|
| Brand Name: | Luowave |
| Model Number: | N210 |
| Place of Origin: | China |
| MOQ: | 1 Piece |
| Price: | USD |
| Payment Terms: | T/T |
| Packaging Details: | Paper Box\Paper Carton |
| Delivery Time: | Spot Goods or 30 Days |
| Supply Ability: | 1 Piece |
| Keywords: | USRP Software Defined Radio |
| Feature: | modular design |
| DC voltage input: | 6 volte |
| Frequency: | DC to 6GHz |
Ethernet Port Series USRP-LW N210
The USRP-LW N210 Series USRP Software Defined Radio features high bandwidth, high dynamic range processing capabilities. The USRP Software Defined Radio is designed for demanding communications applications. The overall architecture of the product includes Xilinx's Spartan3A-DSP3400 FPGA, 100MSPS dual-channel ADC, and 400MSPS dual-channel A DAC that transmits data to the main processor via Gigabit Ethernet.
The USRP-LW N210 features a modular design that operates over a frequency range from DC to 6GHz, while multiple USRP-LW N210 series can be synchronized and formed into a MIMO system through expansion ports on the device. The GPDSO Option Module provides GPS reference clocks with errors in the 0.01 ppm range for multiple USRP-LW N210 devices. The USRP-LW N210 transmits UP to 50MHz of RF bandwidth to the host. Users can implement custom functions within the FPGA architecture or in the 32-bit RISC soft core on the motherboard.
The USRP-LW N210 provides resource-rich FPGA firmware. The FPGA is capable of handling up to 100MHz rf signals upstream and downstream. The FPGA firmware can be updated via Gigabit Ethernet.
The USRP-LW N210 equipment kit includes: one USRP-LW N210 main unit, two SMA head cables, one Ethernet cable, and one power adapter.
USRP-LW N210 technical data:
| Parameter category | numeric value | unit | Parameter category | numeric value | unit |
| Input/Output | RF performance parameters when paired with WBX-LW | ||||
| DC voltage input | 6 | V | Single-sideband signal/image rejection | 35/50 | dBc |
| current | 1.3 | A | Phase noise (1.8GHz). | ||
| Current when installing the WBX daughter board | 2.3 | A | 10kHz | -80 | dBc/Hz |
| Convert module parameters | 100 kHz | -100 | dBc/Hz | ||
| ADC sampling rate | 100 | MS/s | 1MHz | -137 | dBc/Hz |
| ADC resolution | 14 | bits | Output power | 15 | dBm |
| ADC SFDR | 88 | dBc | Enter a third-order intercept point | 0 | dBm |
| DAC sampling rate | 400 | MS/s | Noise figure | 5 | dB |
| DAC resolution | 16 | bits | Physical properties | ||
| DAC SFDR | 80 | dBc | Operating temperature | 0-55 | C |
| With host maximum rate (8b/16b). | 50/25 | MS/s | size | 225×165×50 | mm |
| Local vibration accuracy | 2.5 | ppm | weight | 1.0 | kg |
| Lock GPSDO precision | 0.01 | ppm | |||
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